74151 IC PDF

IC Figure below shows the 8-to-1 multiplexer Integrated circuit of TTL family This Integrated circuit has active LOW ENABLE input and gives. Texas Instruments [ KB ]; Data Sheet (current) [88 KB ]; Fairchild Semiconductors [58 KB ]; Data Sheet (current) [ KB ] 8-Input Multiplexer IC. I3, 1 •, 16, Vcc. I2, 2, 15, I4. I1, 3, 14, I5. I0, 4, 13, I6. Y, 5, 12, I7. Y, 6, 11, S0. E, 7, 10, S1. GND, 8, 9, S2. Pin, Symbol, Description. 1, I3, multiplexer input.

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Many different variations of multiplexers exist. A multiplexer mux or a data icc or input selector is a combinational circuit device that selects one of N inputs and provides it on its output. Its selection lines is therefore made of a single bit.


An enable input makes the multiplexer operate. From there the sum of minterms and the logic function for a ix A common multiplexer is the 8: Pins 5 and 6 are the outputs, the output on pin 6 is the inverted version of the output on pin 5.

Various multiplexers are available in discrete chips as well for both series and series. Multiplexers generally only come in a few common sizes.

MUX with an SR 7451. There are many way to construct a 4: One can use a multiplexer to select which of those lines should be going to the shared data bus.


Large multiplexers can always be built from a collection of smaller ones. Signals to the select lines usually come from a control unit that determines which, if any, of the signals should be routed to some destination.

While smaller overall, this multiplexer is also nonrestoring. A set of inputs called select lines determine which input should be passed to the output. MUXes are core components in most digital systems as they can be used to pass the correct signal based on some conditional logic. It’s often desirable to add an enable or strobe input EN to a multiplexer.

Multiplexer | Electronics Tutorial

Output same as input, High-Z Enable. The top transmission gate controls if the input from A should pass to the output while the bottom transmission gate does the same for the B input. Those types of multiplexers can be 7451 up directly to a shared bus ensuring that only one signal is being generated on the bus at any given time. Typically larger multiplxers over 8 or 16 inputs are built using smaller multiplxers using a multiplexer tree.

Even in ASIC design, arbitrary sized multiplexers are not always offered. Consider a register file with 32 registers where we only want to select a single register at any given time. The K-Map for that truth table is provided on the left. Retrieved from ” https: Additionally multiplexers have also found their way to various other circuits such as adders. Multiplexers are useful in any application in which data must be chosen oc multiple sources to a single destination.


Such multiplexer can be design from four 8: For a multiplexer with Equation upper N inputs, you also need Equation left ceiling log Subscript 2 Baseline left-parenthesis upper N right-parenthesis right ceiling selection lines.

Multiplexer Uc Symbol 2: It does mean that for multiplexers with odd number of inputs, some selection line combinations are not allowed e. A multiplxer is a device that receives multiple inputs from usually different sources. The simplest multiplexer is the 2: Complementary outputs, High-Z Enable.

Vcc is on pin 16 and GND is on pin 8. This section is empty; you can help add the missing info by editing this page. The enable is on pin 7. This section requires expansion; you can help adding the missing info.

This page was last modified on 18 Novemberat Privacy policy About WikiChip Disclaimers. For example, consider a data bus that is connected to multiple memory storage units.

Where Equation m Subscript k is the kth minterm of the variable. A single inverter is used to invert the selection line value to one of the gates so that only one of them e.


A multiplexer with 2 N input lines requires N select lines. A truth table is provided on the right. A set of select lines are then used to choose which of those inputs gets produced as output.

Note that the implementation below is an active-low.

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